1. Field of the Invention
This invention relates to an information reproducing apparatus, and more particularly to an information reproducing apparatus that reads information recorded on to a recording medium such as an optical card.
2. Description of the Related Art
In information reproducing apparatus using optical cards, since the reading speed is determined by the relative speed between the optical head for reading information and the recording medium, the optical scan (hereinafter referred to as scan) of a single track upon which rays of the reading light are directed for readout cannot make the readout speed for data much faster.
To improve this, an apparatus such as disclosed in U.S. Pat. No. 4,730,293, for example, scans more than one track simultaneously and makes a parallel reading of information on the multiple tracks to make the readout speed faster.
The assignee of this application has proposed an apparatus, as is disclosed in Published Unexamined Japanese Patent Application No. 2-141932, which scans a plurality of recording areas of the recording medium simultaneously to demodulate the data read from one recording area (track), and at the same time, to store in the memory the data read from the other recording area (track) and, after the demodulation of the former data is completed, demodulates the stored data. This arrangement allows the demodulation by a single system.
FIG. 4 shows a block diagram of the information reproducing apparatus disclosed in the above mentioned Japanese Patent Application No. 2-141932. In FIG. 4, two tracks n and n+1 of the recording medium are scanned simultaneously, and the reflected light rays are detected by photodetectors 11 and 21, respectively. An output of the photodetector 11 is amplified by an amplifier 12, and then is converted into a binary signal by a binarizing circuit 13. The binary signal passes through a selector 14 and a PLL (Phase-Locked Loop) circuit composed of a phase detector 14 and a VFO (Variable Frequency Oscillator) 17 and then enters a demodulator 18 where it is demodulated. The output of the photodetector 21 is amplified by an amplifier 22, converted into a binary signal by a binarizing circuit 23, and stored in a memory section 24. After the demodulation of the data of the track n is complete, the stored signal is passed through the selector 14 and the PLL circuit 15 and supplied to the demodulator 18.
FIG. 5 is a block diagram of the memory section 24 of FIG. 4. The memory section 24 is made up of a clock module 25, a semiconductor memory 26, a counter 27, and an AND gate 28. When data is stored, the read/write switching signal is first set to the write mode, causing the AND gate 28 to be opened, while the reset signal is supplied to the counter 27, resetting its contents. All these actions are controlled by the controller (not shown). Then, the counter 27 counts up in response to the clock from the clock module 25. The output of the counter 27 is supplied as an address, via the address bus 29, to the semiconductor memory 26, whereas the clock signal from the clock module 25 is supplied to the AND gate 28, which supplies the write pulse to the semiconductor memory 26 in synchronization with the address setting, causing the data to be stored in the specified address. The reading of stored data from the semiconductor memory 26 is accomplished by, after the completion of demodulation of the track n's data, switching the selector 14 in response to the select signal from the controller (refer to FIG. 4) so that the data from the memory section 24 is supplied to the PLL circuit 15, and at the same time, changing the read/write switching signal to the read mode and supplying the reset signal to the counter 27 for an increment of address.
However, in the information reproducing apparatus of FIG. 4 where the clock from the clock module 25 is used as the write pulse for the semiconductor memory 26, if the data contains jitters, it will be stored together with the jitters in the semiconductor memory 26. This makes it impossible to reproduce the data accurately, particularly in the case of demodulating the data recorded in the self-clocked modulation method. Such jitters occur due to, for example, irregular motor rotation, known as cogging, caused by uneven magnetic force within the rotary motor that is used as a drive for the recording medium.